Advanced Digital Design with the Verilog™ HDL + Xilinx 6.3 Student Edition Package Book Features
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Thank You !! Greetings sir, It is requested to answer my query: https://youtu.be/nblGw37Fv8A?t=1594 Around 26 minutes you say that we can use a mux to select which register should give output, but their is a problem. The Mux gives an output of only a single bit so the Data out(N:0) will only have a single bit as output. Kindly clarify. I need professor number ,i want A2A class Thank You so much for the lecture. Wow this was so helpful thank you so much your sound echo not very clear, do you use speaker phone? Sir kindly give 1 session on VHDL as well like if we know Verilog how we can do programming in VHDL as well. I tried to understand it but its bit different and there are some differences which I am not able to understand in perspective of Verilog. Like this session if you can give VHDL session as well it will be great. Thank you so much https://youtu.be/6M3nyyQfpHU A really descriptive video on how to write verilog codes... Even a beginner like me was able to understand what lies in this intriguing topic in a single go! At 8:30 , when the enable signal is on the rising edge, the output shouldn’t 4 also be coming as output? Or does the output starts in the falling edge of the enable signal? Please get a better microphone!!!! Thank you so much sir for this wonderful basic video which helps a lot for beginners like me hello ! can you please provide me reference code for amba ahb lite protocol for my research purposes thanks ! Excellent video sir do you have sdr transmitter code Very impressive tutorial. Thank you for sharing this to us.. A heartful thanks to ur work Please can you design a course on System Verilog and verification through it via UVM? It's not available fully anywhere and may help us a lot. A topic at the core of digital circuit design, covered by an expert of the field. Much needed short course. Thank you. 5.35 could you pls explain what is weekly type and what is strong type ? Tq This channel is definitely going to rock soon Very nicely explained...thank you so much.. Nice mam Thanks mam Mam case sensitive aur notion of time yane? nice work Mam really lec are💙 awesome very helpful...clear concepts..thankyou mam Nice sharing.